Versioned N/M calibrated placement
Validate bounded target calibration documents, select deterministic connected physical qubits, and reject unroutable workloads before lowering.
Calibrated placement 0.1 contract
The runtime, public schema, packed core, and CLI share one strict calibration document reader. Unknown fields, unsupported versions, malformed metrics, duplicate edges, and bounded-input violations fail closed with stable codes.
Deterministic connected selection
For constrained targets, placement grows a connected candidate from every enabled seed, minimizes total readout plus single-qubit error, then breaks ties lexicographically by physical id. High-interaction logical qubits receive the best selected physical qubits.
Fail before lowering
If no enabled connected component can hold the logical register, compilation returns NM-CAL-006 with no placement, lowering trace, or misleading native output.
Permanent 0.1 reader and schema
Version 0.1 rejects unknown properties and future versions until an explicit lossless migration is published. Timestamp spelling is canonical UTC ISO-8601 and byte/item limits are checked before expensive work.
/schemas/nm-target-calibration-0.1.schema.jsonCLI workflow
nm transpile main.nm --calibration calibration.json --jsonThe document target is used when --target is omitted. Supplying both requires an exact match, so calibration data cannot silently compile against another connectivity profile.
Stable calibration diagnostics
Consumers branch on id, qubit, value, capacity, coupling, disconnected-graph, and limit codes instead of localized prose.
NM-CAL-001NM-CAL-002NM-CAL-003NM-CAL-004NM-CAL-005NM-CAL-006NM-CAL-007The 0.1 score is a deterministic heuristic based on declared per-qubit errors. It does not predict hardware fidelity, drift, crosstalk, queue time, or provider availability. Calibration age policy remains the caller's responsibility.
The golden fixture is byte-stable across core and CLI. Conformance covers connected tie-breaks, disconnected fail-closed behavior, schema/runtime equality, strict input limits, and the 256-qubit/4,096-edge performance ratchet.