See what the compiler changes before you run
Inspect optimization rules, circuit diffs, target-native lowering, resource budgets, reversible-lint findings, and static measurement branches in one reviewable report.
Circuit Analysis and Optimization Lab
The lab runs the existing parser, optimizer, target compiler, scheduler, verifier, and resource estimator in a cancellable Worker.
Equivalence is bounded local-statevector evidence. Reversible lint is syntactic, and default target calibration is an educational profile rather than device data.
Portable workbench context
Move strict local artifacts between N/M tools without registering a runtime backend or trusting URL contents.
Resource budget
None appliedPlanning profile
None appliedProfiles remain static compatibility evidence. Calibration references are provenance only; neither can select hardware, scheduling, or noise behavior.
Workspace revision
Load one exact local project revision and its active N/M file.
Saved analysis versions
Keep compiler reports locally, restore the exact original input, and compare two recomputed resource profiles.
RFC roadmap for this surface
These cards expose planned programs. A proposed RFC is not an executable capability or implementation approval.
NM-RFC-0019ProposedImplementation lockedCalibration-aware timing and idle noise
- Proposed activation
- experimental.calibrationAwareTiming=true
NM-RFC-0033ProposedImplementation lockedProduction QPU provider adapter boundary
- Proposed activation
- server-only-provider-configuration